PrimeComp is a engineering consulting company with assignments in energy, industry, and infrastructure. Through our combined experience and unique range of technical expertise, we offer services to create profitable, innovative, and sustainable solutions.Description:PrimeComp is seeking a team of ASIC verifiers to support our client in the telecommunications sector. This role involves a combination of IP design/verification and various levels of SubSys integration/verification. The team will have the opportunity to work remotely within the European time zone.This opportunity is ideal for individuals or groups who can contribute to a larger team effort. We welcome a mix of experience levels, as long as senior members are willing to mentor and support junior colleagues.Competence:
3 or more years of experience in ASIC verification
Proficiency in UVM, with at least one year of practical experience
Familiarity with complex ASIC and/or large FPGA designs
Experience in verifying IP blocks
Knowledge of multiple clock domains
Proficiency in RTL languages such as Verilog, VHDL, and/or SystemVerilog
Excellent English communication skills, both verbally and in writing
Ability to structure and design test benches
Demonstrated leadership qualities
Understanding of RTL design principles
Proficiency in scripting languages
Background in telecommunications is advantageous
Additional Information:
Remote work within the European time zone is acceptable